Professor Serge Demidenko

Professor Serge Demidenko

Professor Serge Demidenko

  • Professor
Department of Smart Computing and Cyber Resilience
  • School of Computing and Artificial Intelligence
Faculty of Engineering and Technology
SDGs Focus

Biography

Professor Serge Demidenko enjoys an extensive career that encompasses working for industry and academia combined with services to professional institutions. He re-joined 糖心原创 (2024) from Massey University (Professor, later - Emeritus Professor). His previous positions included Dean of School (2018-2023) at 糖心原创; Head (earlier 鈥 Associate Head) of School (2014-2018) at Massey University; VP (Academic) and Head of two Schools at RMIT Vietnam, Head of School at Monash University Malaysia, among others. During his career in the industry, he progressed from an Electronic Design Engineer to Head of the Joint R&D Test Lab at a large computer consortium (1987-1992)

Academic & Professional Qualifications

  • PhD (Candidate of Sciences) in Cybernetics & Information Theory, Institute of Engineering Cybernetics, Academy of Sciences of BSSR, Belarus (1984)
  • BEng (USSR 5-year High Engineering Diploma) in Electrical Engineering (Computer Engineering), Belarusian State University of Informatics & Radio Electronics (1977)
  • Docent in Informatics, Control & Computer Engineering 鈥 post-doctoral academic qualification, State Higher Attestation Committee under the Council of Ministers of Belarus (1997)
  • Certificate in Teaching: Higher Education, Singapore Polytechnic & Sheffield University, UK (1994)
  • Chartered Engineer (CEng), UK Engineering Council (1991)

Research Interests

  • Electronic Design and Testing
  • Digital Signal Processing and Generation
  • Instrumentation and Measurement
  • Computer System Engineering
  • Fault Tolerance

Teaching Areas

  • Electronics - Digital and Analog
  • Digital Logic
  • Computer Organization
  • Research Methods in Science and Technology
  • Physical Principles for Engineering & Technology
  • Project Supervision - Individual, Group, Capstone, Research

Courses Taught

  • Physical Principles for Engineering & Technology
  • Design of Computer & Communication Systems.
  • Advanced Micro- Technologies
  • Computer Systems Engineering
  • Analogue Electronics
  • Digital Electronics
  • Digital Logic
  • Engineering Design with Constraints.
  • Embedded Systems Design
  • Electronic Testing, Instrumentation and Measurement
  • Capstone Project
  • Individual Research Project.
  • Project Preparation, Planning and Problem Solving
  • Research Methods in Engineering and Technology.

Notable Publications

  1. 2011 - H CHENG, M P-L OOI, Y C KUANG, E SIM, B CHEAH and S DEMIDENKO: Automatic Yield Management System for Semiconductor Production Test - Proceedings: 6th IEEE International Symposium on Electronic Design, Test and Applications DELTA鈥, January 17-19, 2011, Queenstown, New Zealand, p. 254-258.
  2. 2011 - H CHENG, M P-L OOI, Y C KUANG, S DEMIDENKO and B CHEAH: Outlier Distribution Detection Approach to Semiconductor Wafer Fabrication Process Monitoring - 3rd Asia Symposium on Quality Electronic Design 鈥 ASQED鈥, July 19-20, Kuala Lumpur, Malaysia, p. 62-67.
  3. 2011 - N GAMAGE, Y C KUANG, R AKMELIAWATI and S DEMIDENKO: Gaussian Process Dynamical Models for Hand Gesture Interpretation in Sign Language - Pattern Recognition Letters, v. 32, is. 15, , p. 2009-2014
  4. 2011 - S KHAN, D BAILEY, G SEN GUPTA and S DEMIDENKO: Adaptive Classifier for Robust Detection of Signing Articulators based on Skin Color - Proceedings: 6th IEEE International Symposium on Electronic Design, Test and Applications DELTA鈥, January 17-19, 2011, Queenstown, New Zealand p. 259-262.
  5. 2011 - S Demidenko, A Z Mohtar, K H Lee: Microcontroller Testing using on-Load-Board DAC - Proceedings: IEEE International Instrumentation & Measurement Technology Conference 鈥 I2MTC鈥11, Hangzhou, China, May 10-12, 2011, p. 12-15
  6. 2011 - M S ONG Y C KUANG, M P-L OOI, S DEMIDENKO and P S LIAM: Optimal Dual-Tone Frequency Selection for ADC Sine-Wave Tests 鈥 IEEE Transactions on Instrumentation and Measurement, v. 60, No 5, , p. 1533鈥1545.
  7. 2011 - K-X TEE, M-T Chew and S DEMIDENKO: An Intelligent Warehouse Stock Management and Tracking System based on Silicon Identification Technology and 1-Wire Network Communication - Proceedings: 6th IEEE International Symposium on Electronic Design, Test and Applications DELTA鈥, January 17-19, 2011, Queenstown, New Zealand, p. 110-115.
  8. 2011 - M P-L OOI, E K J SIM, Y C KUANG, S DEMIDENKO, L KLEEMAN and C CHAN: Getting More from the Semiconductor Test: Data Mining with Defect Cluster Extraction - IEEE Transactions on Instrumentation and Measurement, v. 60, No. 10, , p. 3300 - 3317.
  9. 2010 - W J CHENG, M P-L OOI, Y C KUANG, C CHAN and S DEMIDENKO: Performance Analysis of Defect Classification Algorithms for Fabricated Semiconductor Wafers - Proceedings: 5th IEEE International Symposium on Electronic Design, Test and Applications DELTA鈥, January 13-15, 2010, Ho Chi Minh City, Vietnam, p. 360-366
  10. 2010 - M P-L OOI, E K J SIM, Y C KUANG, L KLEEMAN, C CHAN and S DEMIDENKO: Automatic Defect Cluster Extraction for Semiconductor Wafers - Proceedings: IEEE International Instrumentation & Measurement Technology Conference 鈥 I2MTC鈥10, Austin, TX, USA, May 3-6, 2010, p. 1024-1029.
  11. 2010 - L NOLAN, M T CHEW, S DEMIDENKO and M OOI: Virtual Instrumentation based IC Parametric Tester for Engineering Education - Proceedings: 5th IEEE International Symposium on Electronic Design, Test and Applications DELTA鈥, January 13-15, 2010, Ho Chi Minh City, Vietnam, p. 310-315.
  12. 2010 - M P-L OOI, C CHAN, W J TEE, Y C KUANG, L KLEEMAN and S DEMIDENKO: Fast and Accurate Automatic Defect Cluster Extraction for Semiconductor Wafers - Proceedings: 5th IEEE International Symposium on Electronic Design, Test and Applications DELTA鈥, January 13-15, 2010, Ho Chi Minh City, Vietnam, p. 276-280.

Achievements & Accolades

Project: 鈥淏lockchain-Enabled AI Architecture for Trustworthy Digital Health鈥 鈥 Global South AI for Pandemic and Epidemic Preparedness and Response Network, (SDG 03) (SDG 05) 鈥 Initiator, Activities Committee and Malaysia Team Member (2023-present).

Project: 鈥淎nalytical Evaluation of Uncertainty Propagation for Probabilistic Design Optimization鈥 鈥 糖心原创 Internal Grant Scheme, (SDG 09) (SDG12) 鈥 Principal Investigator and Team Leader (2022-2023).

Project: 鈥淩eal-Time Analysis for Flow Rate Estimation in a Medical Aerosol Application and Smart Inhaler Development鈥 鈥 Massey University Research Fund (SDG 03) 鈥 Co-investigator (2023-2024)  
 

Professional Associations

  1. Member (2022-present) 鈥 European Academy of Sciences and Arts
  2. Fellow (1994-present) - The Institution of Engineering & Technology
    -    International Professional Registration Advisor (1992-present) 鈥 IET
    -    Professional Review Interview Assessor (2009-present) - IET
  3. Fellow (2004 - present) - The Institute of Electrical & Electronic Engineers (IEEE)
    -    Member-at-Large (2022-present) - IEEE Awards Board
    -    Chair (2024-2025) - IEEE Technical Field Award Council
    -    Member (2023-present) - IEEE Fellow Committee
    -    Member (2019-present) Conferences Quality 鈥 IEEE Conferences Committee
  4. Fellow (2021鈥損resent) - Asia-Pacific Artificial Intelligence Association (AAIA)
  5. Member-Academician (2023-present) - International Artificial Intelligence Industry Alliance (AIIA)
  6. Affiliate (2014-present), Engineers Australia (EA)
  7. Member (2004-present), Nomination Panel (Advanced Technology: Electronics) - Kyoto Prize, Inamori Foundation
  8. Member (2023-present), Nomination Panel, VinFuture Prize, VinFuture Foundation
  9. Member (present), Editorial Boards of six professional journals